Supports Component YPrPb (HDTV) up to 1080p and analog RGB (VGA) monitor up to 1920x1080 resolution
Support scaled and bypassed video streams output from VGA/HDTV and DVI interfaces simultaneously
Three 10-bit high speed DACs
SPDIF audio interface supports either 16-bit or 20-bit stereo data for up to 192kHz/2ch
Support
2 channel I2S digital audio input for up to 24-bit data stream (32kHz,
44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4kHz and 192kHz)
DDC master for reading EDID
Hot plug detection for DVI
TV/Monitor connection detect capability. DACs can be switched off through programming internal registers
Pixel-level color enhancement for brightness, contrast, hue and saturation adjustment for HDTV and VGA output
On-chip frame buffer supports frame rate conversion provides the graphic controller the flexibility of video timing output
Advanced
scaling engine to upsize/downsize input resolution for DVI display up
to 1080p, VGA up to 1920 x1080 and HDTV up to 1080p
Supports
8/12/16/18/24-bit parallel interface input for either RGB format
(RGB-565, RGB-666 or RGB-888 and etc.) or YCrCb format (ITU-R 656 or
ITU-R 601). 80/86 MPU interface and DE only mode are also supported.
Wide
range of input resolutions support for up to 1366x768 (i.e. 640x480,
720x480, 720x576, 800x600, 1024x600, 1024x768, 1280x800, and etc.)
Image display rotation support at 90/180/270 degree or flipped in horizontal/vertical position
Pixel clock input frequency support for up to 165 MHz
IO Supply Voltages from 1.2V to 3.3V and SPC/SPD Supply Voltages from 1.8V to 3.3V.
Programmable power management
Device fully programmable through serial port or can automatically load firmware from Chrontel Boot ROM (CH9904)
The Chrontel CH7033B is specifically designed for consumer electronics device and PC markets which multiple high definition content display formats are required. With its advanced video encoder, flexible scaling engine and easy-to-configure audio interface, the CH7033B satisfies manufactures’ products display requirements and reduce their costs of development and time-to-market.
High quality high-bandwidth uncompressed video like DVI and YPrPb components or legacy VGA analog display are supported by the device’s color format converter. The 3 high-performance, 10-bit DACs can be used for either HDTV display or VGA output depending on manufactures’ products specification. The device is compliant with EIA770-3 and SMPTE 274M/293M/296M standards and supports HDTV resolution for up to 1080p. The CH7033B has the ability to generate composite syncs if required by the RGB monitor.
The CH7033B’s 24-bit parallel bus accepts a wide range of input data formats from the graphic controller. The built-in video port supports 8/12/16/18/24-bit data interface as well as 80/86 MPU interface. The video format conversion module is capable of translating digital RGB-565, RGB-666, RGB-888 or YCrCb (ITU-R 656, ITU-R 601) signal to the DVI signal, combining with the audio stream. The input digital signal also can be transformed by the DACs for HDTV or VGA analog outputs. The device’s video capture block supports input display resolution for up to 1366x768 which can be either interlaced or non-interlaced timing.
The CH7033B has incorporated a high speed SDRAM that allows manufactures to design their products to achieve simultaneous display digital signal and analog signal. Leverage the benefit of the framebuffer, the device’s sophisticated scaler is able to produce two same video content, which will be routed to separate output driver for display. Frame Rate Conversion is embedded in the scaler; it can maximize the native input resolution up to 1080p for HD display. Furthermore the CH7033B provides additional image manipulation features including image rotation that can be controlled through programming internal registers.
The device supports both SPDIF and 2-channel I²S digital audio input. Its high fidelity audio decoder engine has the capability of sampling audio frequency for up to 192k/2ch. The SPIDF supports PCM encoded data and compressed audio including Dolby Digital and DTS.
The CH7033B has an image enhancement function that can fine tune brightness, contrast, hue and saturation down to the pixel-level.
When the HPD signal is asserted, the CH7033B will automatically generate an interrupt to the processor. A build-in DDC port can read the EDID data from DVI monitor through programming registers by the processor.
Founded in 1986, Chrontel develops and markets mixed-signal integrated circuits. The company is a leading provider of display interface IC's for personal computers, portable media players & smartphones. Interfacing to different computing platform standards including TV, HDTV, LCD, ...
